Low-power consumption anisotropic CMOS inverters based on n-ReS2 and p-WSe2

被引:0
作者
Fu, Ting [1 ]
Liu, Shuai [1 ]
Niu, Baoxin [2 ]
Shen, Wanfu [2 ]
Hu, Chunguang [2 ]
Peng, Ruixuan [3 ]
Liu, Kai [3 ]
Jiang, Chengbao [1 ]
Yang, Shengxue [1 ]
机构
[1] Beihang Univ, Sch Mat Sci & Engn, Beijing 102206, Peoples R China
[2] Tianjin Univ, State Key Lab Precis Measuring Technol & Instrumen, Tianjin 300072, Peoples R China
[3] Tsinghua Univ, Sch Mat Sci & Engn, Beijing 100084, Peoples R China
基金
中国国家自然科学基金;
关键词
anisotropic CMOS inverters; two-dimensional materials; voltage gain; low power consumption; COMPLEMENTARY INVERTERS; TRANSISTORS; LOGIC;
D O I
10.26599/NR.2025.94907231
中图分类号
O64 [物理化学(理论化学)、化学物理学];
学科分类号
070304 ; 081704 ;
摘要
The surge in data volume and algorithmic complexity necessitates the development of highly integrated, low-power, and high-performance electronic components. Conventional complementary metal-oxide-semiconductor (CMOS) inverters, which rely solely on isotropic two-dimensional materials, encounter limitations due to their single voltage output, thereby impeding the miniaturization of integrated circuits. In this study, we introduce anisotropic CMOS inverters based on n-ReS2 and p-WSe2, which demonstrate distinct voltage transfer characteristics across various crystalline orientations. These inverters exhibit the lowest voltage gain along the a-axis of ReS2 flakes, whereas they possess the highest voltage gain and the lowest static power consumption along the b-axis. By optimizing the gate dielectric on substrates, the inverter achieves an enhanced voltage gain of 30.8 and an ultra-low power consumption of 5.4 pW along the b-axis direction, when fabricated on a 35 nm Al2O3 substrate deposited via atomic layer deposition (ALD) method. Additionally, it captures a clear dynamic switching behavior at a supply voltage of 3 V under a 20 Hz square wave input signal. This study proposes a potential approach to circuit miniaturization by leveraging anisotropic two-dimensional materials for the integration of diverse voltage transfer characteristics within a single logic device, thereby achieving a combination of low power consumption and high-density integration.
引用
收藏
页数:8
相关论文
共 48 条
[1]  
B asu A., 2022, P IEEE CUST INT CIRC, P1
[2]   A Compact Current-Voltage Model for 2D Semiconductor Based Field-Effect Transistors Considering Interface Traps, Mobility Degradation, and Inefficient Doping Effect [J].
Cao, Wei ;
Kang, Jiahao ;
Liu, Wei ;
Banerjee, Kaustav .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2014, 61 (12) :4282-4290
[3]   Wrinkled Rhenium Disulfide for Anisotropic Nonvolatile Memory and Multiple Artificial Neuromorphic Synapses [J].
Chen, Yujia ;
Wang, Zhengjie ;
Du, Jiantao ;
Si, Chen ;
Jiang, Chengbao ;
Yang, Shengxue .
ACS NANO, 2024, 18 (44) :30871-30883
[4]   Strain and Interference Synergistically Modulated Optical and Electrical Properties in ReS2/Graphene Heterojunction Bubbles [J].
Chen, Yujia ;
Wang, Yunkun ;
Shen, Wanfu ;
Wu, Minghui ;
Li, Bin ;
Zhang, Qu ;
Liu, Shuai ;
Hu, Chunguang ;
Yang, Shengxue ;
Gao, Yunan ;
Jiang, Chengbao .
ACS NANO, 2022, 16 (10) :16271-16280
[5]   In-Plane Anisotropy in Mono- and Few-Layer ReS2 Probed by Raman Spectroscopy and Scanning Transmission Electron Microscopy [J].
Chenet, Daniel A. ;
Aslan, O. Burak ;
Huang, Pinshane Y. ;
Fan, Chris ;
van der Zande, Arend M. ;
Heinz, Tony F. ;
Hone, James C. .
NANO LETTERS, 2015, 15 (09) :5667-5672
[6]   What Limits the Intrinsic Mobility of Electrons and Holes in Two Dimensional Metal Dichalcogenides? [J].
Cheng, Long ;
Liu, Yuanyue .
JOURNAL OF THE AMERICAN CHEMICAL SOCIETY, 2018, 140 (51) :17895-17900
[7]   Metal-Guided Selective Growth of 2D Materials: Demonstration of a Bottom-Up CMOS Inverter [J].
Chiu, Ming-Hui ;
Tang, Hao-Ling ;
Tseng, Chien-Chih ;
Han, Yimo ;
Aljarb, Areej ;
Huang, Jing-Kai ;
Wan, Yi ;
Fu, Jui-Han ;
Zhang, Xixiang ;
Chang, Wen-Hao ;
Muller, David A. ;
Takenobu, Taishi ;
Tung, Vincent ;
Li, Lain-Jong .
ADVANCED MATERIALS, 2019, 31 (18)
[8]   Complete determination of the crystallographic orientation of ReX2 (X = S, Se) by polarized Raman spectroscopy [J].
Choi, Yun ;
Kim, Keunui ;
Lim, Soo Yeon ;
Kim, Jungcheol ;
Park, Je Myoung ;
Kim, Jung Hwa ;
Lee, Zonghoon ;
Cheong, Hyeonsik .
NANOSCALE HORIZONS, 2020, 5 (02) :308-315
[9]   Large-Area CVD-Grown Sub-2 V ReS2 Transistors and Logic Gates [J].
Dathbun, Ajjiporn ;
Kim, Youngchan ;
Kim, Seongchan ;
Yoo, Youngjae ;
Kang, Moon Sung ;
Lee, Changgu ;
Cho, Jeong Ho .
NANO LETTERS, 2017, 17 (05) :2999-3005
[10]   Low-power-consumption CMOS inverter array based on CVD-grown p-MoTe2 and n-MoS2 [J].
Du, Wanying ;
Jia, Xionghui ;
Cheng, Zhixuan ;
Xu, Wanjing ;
Li, Yanping ;
Dai, Lun .
ISCIENCE, 2021, 24 (12)