Implementation of a Polyphase Filter Bank Channelizer on a Zynq FPGA

This paper describes the design and implementation of a 16-channel polyphase filter bank (PFB) channelizer. The PFB channelizer structure implements a resource-efficient multichannel digital receiver for a set of frequency division multiplexed (FDM) signals that exist in a single sampled data stream. The implementation is based on the Zynq (R) field programmable gate array (FPGA) and aims to exploit the potential for data reuse and flexibility offered by the PFB channelizer structure. General design criteria are summarized for the 16-channel polyphase filter bank channelizer. Python and Vivado simulation results of the performance and operation for the design are also presented.