Hybrid artificial humming bird and coati optimization algorithm fostered power aware application mapping in 3D-NoC system

Application mapping is a challenging and significant field of research in Networks on Chip (NoC). Several types of heuristics have been used so far to solve the NP-hard problem of NoC mapping. Among them, the most popular method for enabling scalable on-chip connectivity in many core systems is network-on-chip (NoC). To overcome these complications, a Hybrid Artificial Humming Bird and Coati Optimization Algorithm fostered Power Aware Application mapping in 3D-NoC System (Hyb ACOA-3D-NoC) is proposed in this paper. Here, the standard network topologies, such as mesh and torus are considered. Firstly, core is designated from NoC benchmarks such as VOPD, MPEG-4 and the weight of every core is designed utilizing Hyb ACOA-3D-NoC method. The Hyb ACOA-3D-NoC technique arranges the cores in descending order, separating the two groups depending on the average communication cost. Afterward, the power aware application mapping method is executed utilizing Hybrid Artificial Humming Bird and Coati Optimization Algorithm (Hyb ACOA). The regular topologies, such as mesh, torus are utilized. The proposed Hyb ACOA-3D-NoC method is implemented in Python. The performance of the proposed Hyb ACOA-3D-NoC approach attains 13.56%, 26.32% and 29% lower power consumption, 22%, 31.8%, and 35.08% lower delay, 14.56%, 29.58%, 27.62% lower time consumption compared to the existing methods, like EMSOA dependent application mapping method for power optimization 3D-NoC (EMSOA-3D-NoC), ILP formulation and heuristic technique for energy-aware application mapping on 3D-NoCs (ILP-3D-NoC), analytically derived vector zed for application graph mapping in interconnection networks (MV-3D-NoC) respectively.