An Energy Efficient DDR5 I/O Performance Boost in Clamshell Configuration by Charge Pumping From Non-Target Device

被引：0

作者：

Oikawa, Ryuichi ^{[1
]}

机构：

[1] Renesas Elect Corp, Kodaira, Tokyo, Japan

来源：

PROCEEDINGS OF THE IEEE 74TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, ECTC 2024 | 2024年

关键词：

DDR5; signal integrity; printed circuit board; design;

D O I：

10.1109/ECTC51529.2024.00149

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper proposes a novel design technique to change non-target I/O load into a signal performance booster in dual-rank memory subsystem by recovering formerly wasted energy at the non-target device. This design technique is suitable for clamshell, dual-surface mounted DDR5 printed circuit board design, offering improved performance with a minimum power consumption.

引用

页码：917 / 923

页数：7