共 61 条
A W-Band TX/RX Chipset With 2.4-GHz LO Synchronization Enabling Full Scalability for FMCW Radar
被引:1
作者:
Zhang, Jingzhi
[1
,2
]
Ahmed, Sherif S.
[1
]
Arbabian, Amin
[1
]
机构:
[1] Stanford Univ, Dept Elect Engn, Stanford, CA 94305 USA
[2] Univ Elect Sci & Technol China UESTC, Sch Elect Sci & Engn, Chengdu 611731, Peoples R China
基金:
中国国家自然科学基金;
关键词:
Radar;
Radar antennas;
Transmitters;
Antenna arrays;
Apertures;
Transceivers;
Scalability;
Synchronization;
Receiving antennas;
Radar imaging;
Antenna-in-package (AiP);
frequency-modulated continuous wave radar (FMCW);
frequency multiplier;
fully scalable;
local oscillator (LO) synchronization;
multiple-input and multiple-output (MIMO);
scalable architecture;
transceiver;
LOCKED FREQUENCY TRIPLER;
POWER-AMPLIFIER;
PHASE-NOISE;
INJECTION LOCKING;
GENERAL-THEORY;
TRACKING LOOP;
OSCILLATORS;
SYNTHESIZER;
TRANSCEIVER;
ANTENNA;
D O I:
10.1109/JSSC.2024.3514667
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
The chip-cascading solution has been widely used in millimeter-wave (mm-wave) frequency-modulated continuous wave (FMCW) radars to enable large-aperture arrays in multiple-input and multiple-output (MIMO) operations. However, scalability remains problematic during implementation. In this work, we propose a W-band FMCW radar transceiver chip architecture to enable full scalability by adopting an local oscillator (LO) distribution frequency as low as 2.4 GHz for cross-chip synchronization. Implemented in the 40-nm CMOS process, we demonstrate a four-channel receiver chip and a single-channel transmitter chip that can operate from 80 to 90 GHz. Meanwhile, we use a ceramic interposer with integrated patch antennas to package the chips to achieve antenna-in-package (AiP). To reconstruct the 84-GHz FMCW chirp signal from the off-chip 2.4-GHz LO distribution chain, we design an on-chip injection-locking-based x 35 frequency multiplier, while the phase noise and harmonic spur issues during reconstruction have been analyzed and carefully arranged. The measured phase noise and harmonic rejection ratio (HRR) are - 112 dBc/Hz at 1-MHz offset and above 50 dBc, respectively, allowing for an over 100-dB radar dynamic range. We demonstrate a radar system by cascading two receiver chips and two transmitter chips to enable an 8 x 2 MIMO array, and achieve an 11.3 degrees angular resolution through an outdoor experiment. Prototype radar systems enable for advanced chip cascading, which is beneficial for next-generation scalable high-resolution imaging radars.
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页码:2736 / 2750
页数:15
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