This article presents a compact, efficient, and linear Q-/V-band silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) cascode power amplifier (PA) for emerging very low-Earth-orbit (VLEO) satellite communication (SATCOM). A novel four-way Wilkinson combiner balun (WCB), realized by two coupled line impedance inverting baluns (ZIBs) and isolation (ISO) resistors ( $R_{\text{ISO}}$ s), is proposed. The design procedure of the proposed four-way WCB, specifically focused on reducing electrical length theta < 45 degrees) and extending bandwidth (BW) of coupled line ZIBs, is revealed in detail and their associated design parameters are subsequently obtained using the so-called graphical extraction method. With this intuitive approach, the four-way WCB is synthesized fast to improve BW, passive efficiency, and signal balance simultaneously, within a compact chip size. Also, the impact of an on-chip ground (GND) parasitic inductance on the PA is studied, where a co-design of layout and schematic is explored to decide an optimal differential SiGe HBT cascode output stage. Fabricated in 0.13-mu m SiGe HBT BiCMOS, the PA obtains measured peak output power (P-out), power added efficiency (PAE), and gain of 24.1 dBm, 35.3%, and 23.0 dB at 43.0 GHz, respectively, with a power density of 1295.6 mW/mm(2) . The 1-dB P-out BW ranges from 39 to 51 GHz, covering both up-and down-links of VLEO SATCOM. It delivers the linear P-out (P-avg ) of 17.9/15.5 dBm with an average PAE (PAE(avg)) of 19.0%/14.5% at 250-/ 400-MHz symbol rate Direct Video Broadcasting-Second Generation Satellite Extension (DVB-S2X 64) amplitude phase shift keying (APSK) signals. To the best of the author's knowledge, this SiGe PA attains the highest gain/peak PAE/P-avg/PAE(avg)/power density at the Q-/V-band, enabling for low-cost, highly integrated VLEO SATCOM TX beamformer ICs (BFICs).