Design of miniaturized package for SiC high-voltage device

被引：0
|
作者：
Yang, Yingkun [1 ]
Gao, Lei
Gong, Tingrui
机构：
[1] China Acad Engn Phys, Microsyst & Terahertz Res Ctr, Chengdu 610200, Peoples R China
来源：
2024 25TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY, ICEPT | 2024年
关键词：
miniaturized package; Low inductance; double-side cooling; high voltage; SiC device;
D O I：
10.1109/ICEPT63120.2024.10668542
中图分类号：
T [工业技术];
学科分类号：
08 ;
摘要：
In this paper, a miniature packaging solution for SiC high-voltage device is presented. The solution involves assembling a single SiC device by soldering between two ceramic substrates, utilizing metal post switches and then filling the gap with potting material. With dual ceramic substrates design in the package, the miniature packaging is characterized by small size, high voltage and double-sided cooling structure. The ceramic substrates are designed and manufactured using DPC (direct copper plating) technology along with through-ceramic-vias (TCVs) to deliver structural support, current paths, and channels for heat dissipation. Compared to TO247 packages, the miniaturized packages exhibit a reduction in size by 90% and a decrease in parasitic inductance by 80%. The high-voltage insulation tests conducted demonstrate that the miniaturized package can endure voltages up to 3 kV while maintaining a low leakage current in the nanoampere range.
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页数：4
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