Electrostatic discharge failure and protection of single-walled carbon nanotube field-effect transistors

Carbon nanotube-based field-effect transistors (CNT-FETs) have been considered as an alternative to traditional Si-based metal-oxide-semiconductor FETs. Here we investigate the electrostatic discharge (ESD) failure characteristics of single-walled CNT (SWCNT) FETs. In an ESD event, the instantaneous high current will generate a certain amount of heat in the CNT-FET channel, resulting in its thermal failure owing to its randomly aligned SWCNT networks. The CNT-FET failure mechanism and its ESD characteristics with various key parameters are studied in detail. These insights provide new ideas and guidance for research into and application of CNT-FETs. In order to achieve a full chip ESD protection network for CNT chips, we refer to commonly used ESD devices in silicon-based processes and designed CNT-based ESD devices, including GD-CNT-FETs (gated-VDD CNT-FET) and RC-CNT-FET (RC-trigger CNT-FET). CNT-FETs with randomly aligned SWCNT networks, whose failure current level is only about 50 mu A mu m-1, need a larger area to achieve effective ESD protection.