Physically Secure Logic Locking With Nanomagnet Logic

被引:0
|
作者
Edwards, Alexander J. [1 ]
Hassan, Naimul [1 ]
Arzate, Jared D. [2 ]
Chin, Alexander N. [1 ]
Bhattacharya, Dhritiman [3 ]
Shihab, Mustafa M. [1 ]
Zhou, Peng [1 ]
Hu, Xuan [1 ]
Atulasimha, Jayasimha
Makris, Yiorgos [1 ]
Friedman, Joseph S. [1 ]
机构
[1] Univ Texas Dallas, Dept Elect & Comp Engn, Richardson, TX 75080 USA
[2] Univ Texas Austin, Dept Elect & Comp Engn, Austin, TX 78712 USA
[3] Virginia Commonwealth Univ, Dept Mech & Nucl Engn, Richmond, VA 23284 USA
关键词
Logic; Security; Nonvolatile memory; Integrated circuits; Foundries; Logic gates; Layout; Boolean satisfiability (SAT) attacks; hardware security; logic locking; nanomagnet logic (NML); perpendicular magnetic anisotropy (PMA); physical security; polymorphic logic; satisfiability; RELIABILITY;
D O I
10.1109/TCAD.2024.3434362
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Securing integrated circuits against counterfeiting through logic locking presents the fundamental challenge of protecting a locking key from physical, Boolean satisfiability (SAT)-based, and structural threats. Prior research has mainly focused on enhancing logic locking to thwart SAT-based and structural attacks but overlooked the necessity of robust physical security. Our work introduces a novel approach: a logic locking scheme utilizing the nonvolatile properties of nanomagnet logic (NML) to provide comprehensive protection. Polymorphic NML minority gates along with conventional locking techniques fortify the locking key against SAT-based and structural threats, while a protective shield, inducing strain in the nanomagnets, offers physical security via a self-destruct mechanism. Although the NML system improves physical security and preserves security against SAT-based and structural attacks, it suffers from drawbacks related to limited reliability and speed, which result in a notable security overhead cost. Consequently, we propose a hybrid CMOS/NML logic locking approach in which NML islands are integrated into a predominantly CMOS-based system. This hybrid solution continues to deliver security against physical, SAT-based, and the known structural attacks while minimizing the associated overhead. We evaluate the security of such hybrid systems against conventional and physically enhanced SAT attacks. The hybrid logic systems are found to retain the security against conventional SAT-based attacks. We further find that these hybrid logic systems are also robust to physically enhanced SAT attacks in which the attacker has access to all internal electrical signals. These hybrid logic systems are thus shown to provide security against all known physical attacks as well as SAT-based attacks, with minimal efficiency tradeoffs resulting from the use of emerging technologies.
引用
收藏
页码:105 / 118
页数:14
相关论文
共 50 条
  • [31] Synthesis of Hidden State Transitions for Sequential Logic Locking
    Juretus, Kyle
    Savidis, Ioannis
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2021, 40 (01) : 11 - 23
  • [32] Evolution of Logic Locking
    Yasin, Muhammad
    Sinanoglu, Ozgur
    2017 IFIP/IEEE INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION (VLSI-SOC), 2017, : 237 - 242
  • [33] LOOPLock 2.0: An Enhanced Cyclic Logic Locking Approach
    Yang, Xiang-Min
    Chen, Pei-Pei
    Chiang, Hsiao-Yu
    Lin, Chia-Chun
    Chen, Yung-Chih
    Wang, Chun-Yao
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 41 (01) : 29 - 34
  • [34] Quantifying the Efficacy of Logic Locking Methods
    Sweeney, Joseph
    Garg, Deepali
    Pileggi, Lawrence
    PROCEEDINGS OF THE 37TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, VLSID 2024 AND 23RD INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS, ES 2024, 2024, : 541 - 546
  • [35] Deceptive Logic Locking for Hardware Integrity Protection Against Machine Learning Attacks
    Sisejkovic, Dominik
    Merchant, Farhad
    Reimann, Lennart M.
    Leupers, Rainer
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 41 (06) : 1716 - 1729
  • [36] Lockit: A Logic Locking Automation Software
    Kajtez, Nemanja
    Zhang, Yue
    Halak, Basel
    ELECTRONICS, 2021, 10 (22)
  • [37] A Secure Hardware-Software Solution Based on RISC-V, Logic Locking and Microkernel
    Sisejkovic, Dominik
    Merchant, Farhad
    Reimann, Lennart M.
    Leupers, Rainer
    Giacometti, Massimiliano
    Kegreiss, Sascha
    PROCEEDINGS OF THE 23RD INTERNATIONAL WORKSHOP ON SOFTWARE AND COMPILERS FOR EMBEDDED SYSTEMS (SCOPES 2020), 2020, : 62 - 65
  • [38] UNSAIL: Thwarting Oracle-Less Machine Learning Attacks on Logic Locking
    Alrahis, Lilas
    Patnaik, Satwik
    Knechtel, Johann
    Saleh, Hani
    Mohammad, Baker
    Al-Qutayri, Mahmoud
    Sinanoglu, Ozgur
    IEEE TRANSACTIONS ON INFORMATION FORENSICS AND SECURITY, 2021, 16 : 2508 - 2523
  • [39] Functional Analysis Attacks on Logic Locking
    Sirone, Deepak
    Subramanyan, Pramod
    IEEE TRANSACTIONS ON INFORMATION FORENSICS AND SECURITY, 2020, 15 : 2514 - 2527
  • [40] MPloC: Privacy-Preserving IP Verification using Logic Locking and Secure Multiparty Computation
    Mouris, Dimitris
    Gouert, Charles
    Tsoutsos, Nektarios Georgios
    2023 IEEE 29TH INTERNATIONAL SYMPOSIUM ON ON-LINE TESTING AND ROBUST SYSTEM DESIGN, IOLTS, 2023,