Troubleshooting a High-Leakage Issue of an Overdrive FinFET ESD Power Clamp From Fabrication Perspective

被引：0
作者：
Lu, Guangyi [1 ,2 ]
Wang, Lihui [3 ]
Wang, Ling [3 ]
Gao, Xin [3 ]
Wei, Jiahao [3 ]
Wang, Haiming [2 ,4 ]
机构：
[1] Southeast Univ, Natl ASIC Ctr, Sch Integrated Circuits, Nanjing 210096, Peoples R China
[2] Natl Ctr Technol Innovat EDA, Res & Dev Dept, Nanjing 210031, Peoples R China
[3] HiSilicon Technol Co LTD, COT Design Dept, Shenzhen 518129, Peoples R China
[4] Southeast Univ, Sch Informat Sci & Engn, State Key Lab Millimeter Waves, Nanjing 210096, Peoples R China
来源：
IEEE TRANSACTIONS ON ELECTRON DEVICES | 2025年 / 72卷 / 01期
关键词：
Clamps; Electrostatic discharges; Silicon; Resistors; FinFETs; Simulation; Logic gates; Inverters; Earth Observing System; Research and development; Electrostatic discharge (ESD); high-resistance (HiR) resistor; leakage current; overdrive ESD power clamp; PROTECTION; CIRCUIT; DESIGN; VOLTAGE;
D O I：
10.1109/TED.2024.3509389
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This article presents the troubleshooting of a high-leakage issue in an overdrive fin field-effect transistor (FinFET) electrostatic discharge (ESD) power clamp. With silicon data exhibiting abnormal results, elaborate troubleshooting, including device reliability and simulation to silicon (S2S) gap analyses, are performed and presented. Through alignments of silicon data and presumptive simulation results, fabrication-induced root cause is successfully revealed. It is confirmed by physical failure analysis (PFA) results that the narrow width of high-resistance (HiR) resistors induces an aggressive pull-back effect during fabrication. This pull-back effect results in open connections of related HiR resistors and explains the observed abnormal silicon data.
引用
收藏
页码：62 / 67
页数：6
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