Design of a Low Phase Noise LC-VCO in 22nm Process Technology

被引：0

作者：

Liu, Feng ^{[1
]}

Zhu, Yunxiao ^{[1
]}

Ke, Ziqi ^{[1
]}

Wu, Zhuoji ^{[1
]}

Li, Mingze ^{[1
]}

He, Wenlong ^{[1
]}

机构：

[1] Shenzhen Univ, State Key Lab Radio Frequency Heterogeneous Integ, Coll Elect & Informat Engn, Inst Microelect, Shenzhen, Peoples R China

来源：

2024 CROSS STRAIT RADIO SCIENCE AND WIRELESS TECHNOLOGY CONFERENCE, CSRSWTC 2024 | 2024年

关键词：

phase noise; LC-17C0; 22 nnt FD-SOI; filtering technique;

D O I：

10.1109/CSRSWTC64338.2024.10811658

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a design method of LC-VCO with Class -B structure using 22 nm FD-SOI process. The VCO mainly uses second harmonic filtering technology to reduce phase noise. The supply voltage is 0.8V and the power consumption is 12.3mW. The simulation results show that when the frequency tuning range is 18.9 GIL to 21.3 GHz, the phase noise at 1MHz offset is -108.56 dBc/Hz. At this frequency, the VCO has good noise performance.

引用

页码：563 / 565

页数：3

共 5 条

[1] A 3.5-mW, 2.5-GHz diversity receiver and a 1.2-mW, 3.6-GHz VCO in silicon on anything [J].