Approximate Ternary Matrix Multiplication for Image Processing and Neural Networks

被引:0
作者
Krishna, L. Hemanth [1 ]
Srinivasu, B. [1 ]
机构
[1] Indian Inst Technol Mandi, Sch Comp & Elect Engn SCEE, Mandi, Himachal Prades, India
来源
2024 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, ISVLSI | 2024年
关键词
Ternary compressor; Multiplier; approximation; matrix multiplication; image processing; neural networks; SYNTHESIS METHODOLOGY; DESIGN;
D O I
10.1109/ISVLSI61997.2024.00060
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a Carbon Nanotube FET-based ternary matrix multiplication using systolic array architecture for applications towards ternary neural networks and image processing applications. A ternary multiplier is proposed using ternary 4:2 compressors, which reduces the hardware by 18% in terms of the number of CNTFETs over the best existing designs. The compressors are approximated for energy-efficient applications. The approximate 4:2 compressor saves 19% of the energy over the proposed accurate design. A 6 x 6 multiplier designed using proposed approximate compressors saves 20% of the energy over the recent approximate multiplier. The proposed approximate multiplier has a better MRED and results in better image quality when deployed in image multiplication and image smoothing applications. A neural network is implemented using the proposed matrix multiplication for image classification results in an accuracy of 96% to 98% for various errors in multipliers.
引用
收藏
页码:290 / 295
页数:6
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