OPTIMIZED DEEP CONVOLUTIONAL NEURAL NETWORK FOR WAFER MAP DEFECTS CLASSIFICATION

被引:0
作者
Amogne, Zemenu Endalamaw [1 ]
Chou, Jia-Hong [2 ]
机构
[1] Bahir Dar Univ, Fac Mech & Ind Engn, Bahir Dar, Ethiopia
[2] Natl Taiwan Univ Sci & Technol, Dept Ind Management, Taipei, Taiwan
来源
PROCEEDINGS OF ASME 2024 19TH INTERNATIONAL MANUFACTURING SCIENCE AND ENGINEERING CONFERENCE, MSEC2024, VOL 2 | 2024年
关键词
Class imbalance; deep convolutional neural network; defect pattern recognition; wafer map; PATTERN-RECOGNITION; IDENTIFICATION;
D O I
暂无
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Wafer maps contain important information about defect patterns, and are used by engineers to trace the root causes of abnormal processes; early detection can improve the yield of a manufacturing process. Wafer map defects have been classified using a variety of deep convolutional neural networks (DCNN). However, factors such as the number of hidden layers, the input image's size, and the dropout values in the dense layers can affect classification performance. Class imbalance in the training and testing data sets also affects model performance. We therefore propose an optimal DCNN model, called Opt-DCNN, and compare its defect pattern classification with other DCNN models using an actual wafer map data set (WM-811K). Opt-DCNN is shown to be superior to the three existing DCNN models among the three tested input image sizes, in terms of F1 score, precision, accuracy, and recall. For the 26x26 input image size, the proposed method achieves a test accuracy of 99.345%, which is better than the three published models with 98.768%, 98.442%, and 67.622%, respectively. The comparisons indicate that using a DCNN with dropout can improve wafer defect pattern recognition.
引用
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页数:9
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