A GRO-Based Configurable TDC With 80/160-ps Resolution in Single-Channel and Interleaving Mode

被引：1

作者：

Hu, Jin ^{[1
]}

Ma, Jiaji ^{[1
]}

Ping, Yuhan ^{[1
]}

Wang, Xiayu ^{[1
]}

Li, Dong ^{[1
]}

Ma, Rui ^{[1
]}

Zhu, Zhangming ^{[1
]}

机构：

[1] Xidian Univ, Sch Integrated Circuits, Key Lab Analog Integrated Circuits & Syst, Minist Educ, Xian 710071, Peoples R China

来源：

IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT | 2025年 / 74卷

基金：

中国国家自然科学基金;

关键词：

Timing; Throughput; Photonics; Signal resolution; Logic gates; Synchronization; Event detection; Background noise; Ring oscillators; Reliability; CMOS; gated ring oscillator (GRO); high throughput; interleaving mode; time-to-digital converter (TDC); HIGH-SPEED; SENSOR; LIDAR;

D O I：

10.1109/TIM.2025.3545989

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This article introduces a compact time-to-digital converter (TDC) based on a single gated ring oscillator (GRO) for applications in time-correlated single-photon counting (TCSPC) 3-D imaging. The TDC's core comprises a feed-forward cross-coupled ring oscillator (RO), providing versatility by operating in either single-channel or interleaving mode. In the single-channel mode, it functions similar to a traditional four-stage GRO-based TDC with a resolution of 80 ps. In interleaving mode, two loops within the cross-coupled RO can be sequentially enabled, establishing two channels based on two two-stage cross-coupled ROs. Each channel exhibits a minimum processing time of 2 ns and a resolution of 160 ps. To achieve low power consumption, both the encoder and counter are partially reused or interleaved. The proposed TDC has been fabricated using a 130-nm process. Experimental measurements demonstrate a reliable event rate of up to 500 MHz, rendering it suitable for high-throughput applications.

引用

页数：10

共 44 条

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