The relevance of power electronics converters is undoubted and is growing in many modern applications. Real-Time Simulation (RTS) is commonly used to test converters before deployment, assessing what-if scenarios that may pose risks or add costs. RTS can also run alongside the real system for online assessment through direct comparison. Most of the research in this area focuses on accelerating the execution of RTS to comply with shorter sampling times. As a result, Field-Programmable Gate Arrays (FPGAs) are typically preferred, while microcontrollers have been mostly overlooked under the premise of their inferior throughput. However, it has not been assessed how fast a RTS must actually be, beyond the usual suggestion of always accelerating its execution. Therefore, this study was intended to find a fair balance between computational requirements and RTS error, aiming to identify operating conditions applicable to digital systems. A case study on a commercial buck converter with a RTS in a microcontroller tested the modeling Integral Squared Error (ISE). The RTS was run at various execution frequencies while the input PWM frequency varied between 2 and 100 times faster; 6,000 randomized duty cycles (0.2 to 0.8) were tested and their ISEs were statistically analyzed. The results show that smaller RTS time steps do not necessarily reduce the error. The minimum ISE occurred when the RTS execution frequency was about 35 to 45 times higher than the PWM frequency, regardless of the RTS frequency. This study challenges the idea that faster RTS always means lower error and demonstrates the potential of low-end digital devices for RTS.
