Investigations on low-temperature thermocompression bonding of passivated aluminum for enhanced wafer-level packaging and heterogeneous integration

被引:0
|
作者
Diex, Kevin [1 ,2 ]
Jaeckel, Tobias [1 ,2 ]
Wuensch, Dirk [1 ]
Vogel, Klaus [1 ,2 ]
Bonitz, Jens [1 ]
Hanisch, Anke [1 ]
Wiemer, Maik [1 ]
Schulz, Stefan E. [1 ,2 ]
机构
[1] Fraunhofer ENAS, Technol Campus 3, D-09126 Chemnitz, Germany
[2] Tech Univ Chemnitz, Ctr Microtechnol, Reichenhainer Str 70, D-09126 Chemnitz, Germany
关键词
D O I
10.1109/SSI63222.2024.10740521
中图分类号
学科分类号
摘要
Aluminum-to-Aluminum (Al/Al) bonding is critical for wafer-level packaging and heterogeneous integration in modern CMOS compatible semiconductor technologies. Due to electronic devices become smaller and more complex, Al/Al bonding offers a scalable solution with improved thermal management with good electrical performance. Recent advances in low-temperature thermal compression bonding highlight the potential for reliable, high-throughput integration, establish Al/Al bonding a key enabler of semiconductor technology. Due to the property of forming a strong oxide, high temperatures and pressures are typically required to create successful Al-Al bonding at wafer level. In this study, a low-temperature thermocompression bonding process for aluminum limited to a maximum temperature of 350 degrees C is investigated. In contrast to conventional processes, no wet chemical treatment is used to remove surface oxides on the aluminum. Instead, an in-situ PVD deposition technique is used in which an ultra-thin layer of precious metal is applied to prevent oxidation of the aluminum. Titanium is chosen next to palladium specifically for its role in passivating the aluminum surface to ensure improved stability and prevent unwanted oxidation effects during the bonding process. In this study, an additional layer under the aluminum is also being investigated to reduce the surface roughness of the aluminum. This layer is strategically introduced to improve the overall roughness and quality of the aluminum surface to address important aspects of the bonding process. Thermocompression bonding was performed on both unpatterned and patterned wafers, with the patterned wafers using 60 mu m and 80 mu m wide frames for bonding. The subsequent investigations included the evaluation of the interface quality by atomic force microscopy (AFM), scanning electron microscopy (SEM) and the evaluation of the reliability by shear tests.
引用
收藏
页数:4
相关论文
共 50 条
  • [1] Low-temperature wafer-level transfer bonding
    Niklaus, F
    Enoksson, P
    Griss, P
    Kälvesten, E
    Stemme, G
    JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, 2001, 10 (04) : 525 - 531
  • [2] Strong, high-yield and low-temperature thermocompression silicon wafer-level bonding with gold
    Taklo, MMV
    Storås, P
    Schjolberg-Henriksen, K
    Hasting, HK
    Jakobsen, H
    JOURNAL OF MICROMECHANICS AND MICROENGINEERING, 2004, 14 (07) : 884 - 890
  • [3] Study on the Gold-Gold Thermocompression Bonding for Wafer-level Packaging
    Wu, Jing
    Jia, Shixing
    Wang, Yunxiang
    Zhu, Jian
    MICRO AND NANO TECHNOLOGY: 1ST INTERNATIONAL CONFERENCE OF CHINESE SOCIETY OF MICRO/NANO TECHNOLOGY(CSMNT), 2009, 60-61 : 325 - +
  • [4] Low temperature bonding process for wafer-level MEMS packaging
    Wei, J
    Wong, CK
    Lee, LC
    2004 IEEE INTERNATIONAL CONFERENCE ON SEMICONDUCTOR ELECTRONICS, PROCEEDINGS, 2004, : A19 - A26
  • [5] A dynamic study for wafer-level bonding strength uniformity in low-temperature wafer bonding
    Zhang, XX
    Raskin, JP
    ELECTROCHEMICAL AND SOLID STATE LETTERS, 2005, 8 (10) : G268 - G270
  • [6] Low Temperature Wafer Bonding for Wafer-Level 3D Integration
    Dragoi, V.
    Rebhan, B.
    Burggraf, J.
    Razek, N.
    2014 4TH IEEE INTERNATIONAL WORKSHOP ON LOW TEMPERATURE BONDING FOR 3D INTEGRATION (LTB-3D), 2014, : 9 - 9
  • [7] Low-Temperature Al-Al Thermocompression Bonding with Sn Oxidation Protect Layer for Wafer-Level Hermetic Sealing
    Satoh, Shiro
    Fukushi, Hideyuki
    Esashi, Masayoshi
    Tanaka, Shuji
    ELECTRONICS AND COMMUNICATIONS IN JAPAN, 2017, 100 (08) : 43 - 50
  • [8] Low-temperature thin-film indium bonding for reliable wafer-level hermetic MEMS packaging
    Straessle, R.
    Petremand, Y.
    Briand, D.
    Dadras, M.
    de Rooij, N. F.
    JOURNAL OF MICROMECHANICS AND MICROENGINEERING, 2013, 23 (07)
  • [9] Low-Temperature Wafer-Level Bonding with Cu-Sn-In Solid Liquid Interdiffusion for Microsystem Packaging
    Golim, Obert
    Vuorinen, Vesa
    Wernicke, Tobias
    Pawlak, Marta
    Paulasto-Krockel, Mervi
    MICROELECTRONIC ENGINEERING, 2024, 286
  • [10] Fan-Out Wafer-Level Packaging for Heterogeneous Integration
    Lau, John
    Li, Ming
    Li, Margie
    Chen, Tony
    Xu, Iris
    Yong, Qing Xiang
    Cheng, Zhong
    Fan, Nelson
    Kuah, Eric
    Li, Zhang
    Tan, Kim Hwee
    Cheung, Y. M.
    Ng, Eric
    Lo, Penny
    Kai, Wu
    Hao, Ji
    Wee, Koh Sau
    Ran, Jiang
    Xi, Cao
    Beica, Rozalia
    Lim, Sze Pei
    Lee, N. C.
    Ko, Cheng-Ta
    Yang, Henry
    Chen, Y. H.
    Tao, Mian
    Lo, Jeffery
    Lee, Ricky
    2018 IEEE 68TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2018), 2018, : 2360 - 2366