CDE: A Novel CGRA Development Environment with Fast Design Space Exploration Framework

被引：0

作者：

Chen, Sichao ^{[1
]}

Dai, Yuan ^{[1
]}

Zhang, Jide ^{[1
]}

Kuang, Huizhen ^{[1
]}

Gao, Xuchen ^{[1
]}

Luk, Wai-Shing ^{[1
]}

Yin, Wenbo ^{[1
]}

Wang, Lingli ^{[1
]}

机构：

[1] Fudan Univ, State Key Lab Integrated Chips & Syst, Shanghai, Peoples R China

来源：

2024 INTERNATIONAL SYMPOSIUM OF ELECTRONICS DESIGN AUTOMATION, ISEDA 2024 | 2024年

基金：

中国国家自然科学基金;

关键词：

CGRA; design space exploration; graph analysis; agile hardware design;

D O I：

10.1109/ISEDA62518.2024.10618029

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The Coarse-grained reconfigurable array (CGRA) hardware design optimization is hampered by time-consuming design exploration and evaluation methods. This paper proposes CDE, a novel CGRA Development Environment with a graph-analysis-based fast design space exploration (DSE) framework and an accurate hardware evaluation tool. CDE significantly improves the efficiency of CGRA architecture development, paving the way for agile hardware design.

引用

页码：772 / 772

页数：1

共 50 条

[21] A Mapping Framework Based on Packing for Design Space Exploration of Heterogeneous MPSoCs
Ristau, Bastian
Limberg, Torsten
Fettweis, Gerhard
JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2009, 57 (01): : 45 - 56
[22] A framework for design space exploration and performance analysis of networked embedded systems
Dep. of Computer Science, University of Cantabria, Spain
不详
ACM Int. Conf. Proc. Ser.,
[23] An Environment for Design Space Exploration using gem5-McPAT
Tashiro, Renan
Oyamada, Marcio Seiji
2016 VI BRAZILIAN SYMPOSIUM ON COMPUTING SYSTEMS ENGINEERING (SBESC 2016), 2016, : 220 - 225
[24] A plan-generation-evaluation framework for design space exploration of digital systems design
Kim, JK
Kim, TG
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2006, E89A (03) : 772 - 781
[25] ACCDSE: A Design Space Exploration Framework for Convolutional Neural Network Accelerator
Li, Zhisheng
Wang, Lei
Dou, Qiang
Tang, Yuxing
Guo, Shasha
Zhou, Haifang
Lu, Wenyuan
COMPUTER ENGINEERING AND TECHNOLOGY, NCCET 2017, 2018, 600 : 22 - 34
[26] Fast Performance Estimation and Design Space Exploration of SSD Using AI Techniques
Kim, Jangryul
Ha, Soonhoi
EMBEDDED COMPUTER SYSTEMS: ARCHITECTURES, MODELING, AND SIMULATION, SAMOS 2020, 2020, 12471 : 1 - 17
[27] Fast Parallel Application and Multiprocessor Design Space Exploration from Sequential Code
Schwambach, Vitor
Cleyet-Merle, Sebastien
Issard, Alain
Mancini, Stephane
2015 INTERNATIONAL CONFERENCE ON HARDWARE/SOFTWARE CODESIGN AND SYSTEM SYNTHESIS (CODES+ISSS), 2015, : 163 - 172
[28] Fast Design-Space Exploration Method for SW/HW codesign on FPGAs
Ando, Yuki
Shibata, Seiya
Honda, Shinya
Takada, Hiroaki
Tomiyama, Hiroyuki
2014 IEEE 22ND ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM 2014), 2014, : 235 - 235
[29] A Fast Design Space Exploration Method for Reconfigurable Architecture Based on Loop Optimization
Zhang, Dan
Zhao, Rongcai
Han, Lin
Liang, Weifang
Qu, Jin
Liu, Xiaonan
MATERIALS, MECHATRONICS AND AUTOMATION, PTS 1-3, 2011, 467-469 : 812 - 817
[30] A rapid and efficient isogeometric design space exploration framework with application to structural mechanics
Benzaken, J.
Herrema, A. J.
Hsu, M. -C.
Evans, J. A.
COMPUTER METHODS IN APPLIED MECHANICS AND ENGINEERING, 2017, 316 : 1215 - 1256

← 1 2 3 4 5 →