The direct epitaxy of III-V materials on CMOS-compatible on-axis Si (001) is vital for scalable, cost-effective optoelectronic devices. However, material dissimilarities introduce crystal defects, such as antiphase boundaries (APBs) and threading dislocations (TDs), impairing performance. This study refines Si surface step stability modeling by incorporating temperature-dependent effects, elucidating single atomic step stability under high-temperature III-V growth conditions. We achieve APB-free III-V growth on Si (001) through (1) a 10 monolayer thin Si buffer layer enabling single atomic steps and (2) direct GaAs epitaxy on Ar plasma-treated Si. We identify wave-shaped S b edge steps as key to APB self-annihilation and demonstrate that an ultra-thin Si buffer effectively suppresses APBs while minimizing thermal strain. In addition, we evaluate Ar plasma treatment, showing that it enables APB-free GaAs growth, with a Si buffer further enhancing step periodicity and reducing TD density. These insights optimize III-V/Si integration, advancing CMOS-compatible optoelectronic technologies.
