A 10 MS/s 12-bit Cryogenic SAR ADC in 22nm FD SOI for Quantum Computing

被引：0

作者：

Zhao, Jinghao ^{[1
]}

Li, Zheyi ^{[1
,2
]}

Qing, Yihong ^{[1
]}

Ma, Qichao ^{[1
]}

Wang, Chaohan ^{[2
,3
]}

Prinze, Jeffrey ^{[1
]}

Leroux, Paul ^{[1
]}

机构：

[1] Katholieke Univ Leuven, Dept Elect Engn ESAT, ADVISE Grp, Geel, Belgium

[2] IMEC, Leuven, Belgium

[3] Imperial Coll London, Dept Elect & Elect Engn, London, England

来源：

2024 22ND IEEE INTERREGIONAL NEWCAS CONFERENCE, NEWCAS 2024 | 2024年

关键词：

cryogenic electronics; cryo-CMOS; SAR ADC; quantum computing; CMOS TECHNOLOGY;

D O I：

10.1109/NEWCAS58973.2024.10666325

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a 12-bit cryogenic successive-approximation (SAR) ADC designed in 22nm FD SOI technology for quantum computing. An auto-zeroing technique and dual comparators in alternate working mode are implemented to eliminate signal-dependent comparator offset under cryogenic conditions. In addition, full forward body biasing (FBB) with flipped well scheme is employed to compensates for increased threshold voltage Vth induced by ultra-low temperature. Compared to the previous works, this is the first reported high-resolution SAR ADC which deals with cryogenic environment in advanced technology node. Post-layout simulation results show the ADC achieves a FoM(w) of 26 fJ/step, 71.68 dB SNDR and 83.76 dB SFDR at the Nyquist input frequency of 4.96MHz.

引用

页码：60 / 64

页数：5

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