Topology Optimization of Operational Amplifiers Using A Performance-aware Representation

The automatic synthesis of operational amplifiers (opamps) is in high demand to meet the diverse performance requirements of a wide range of analog circuit applications. However, existing opamp topology synthesis methods neglect circuit performance while generating circuit representations, resulting in suboptimal efficiency. To address this issue, this paper proposes a novel opamp topology optimization approach based on a performance-aware topology representation. Specifically, topology information is captured using a customized graph neural network (GNN), while performance information is incorporated by training the GNN for performance prediction through supervised learning. By combining this performance-aware representation with the genetic algorithm, an efficient opamp topology optimization method is developed. Experimental results demonstrate that our approach outperforms state-of-theart methods in terms of both optimization efficiency and results.