Thread and Data Mapping in Software Transactional Memory: an Overview

被引：0

作者：

Pasqualin, Douglas Pereira ^{[1
]}

Diener, Matthias ^{[2
]}

Du Bois, Andre Rauber ^{[1
]}

Pilla, Mauricio Lima ^{[1
]}

机构：

[1] Univ Fed Rio Grande do Sul, Grad Program Comp Sci PPGC, BR-91501570 Porto Alegre, RS, Brazil

[2] Univ Illinois, Champaign, IL 61801 USA

来源：

INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING | 2025年 / 53卷 / 03期

关键词：

Software transactional memory; Thread mapping; Data mapping; Communication;

D O I：

10.1007/s10766-025-00796-1

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

In current microarchitectures, due to the complex memory hierarchies and different latencies on memory accesses, thread and data mapping are important issues to improve application performance. Software transactional memory (STM) is an abstraction used for thread synchronization, replacing the use of locks in parallel programming. Regarding thread and data mapping, STM presents new challenges and mapping opportunities, since (1) STM can use different conflict detection and resolution strategies, making the behavior of the application less predictable, and; (2) the STM runtime has precise information about shared data and the intensity with each thread accesses them. These unique characteristics provide many opportunities for low-overhead, but precise statistics to guide mapping strategies for STM applications. The main objective of this paper is to survey the existing work about thread and data mapping that uses solely information gathered from the STM runtime to guide thread and data mapping decisions. We also discuss future research directions within this research area.

引用

页数：21

共 54 条

[1]

Agrawal Rakesh., 1994, PROC 20 INT C VERY L, P487, DOI DOI 10.5555/645920.672836

[2] Are Static Schedules so Bad ? A Case Study on Cholesky Factorization [J].

Agullo, Emmanuel ;

Beaumont, Olivier ;

Eyraud-Dubois, Lionel ;

Kumar, Suraj .

2016 IEEE 30TH INTERNATIONAL PARALLEL AND DISTRIBUTED PROCESSING SYMPOSIUM (IPDPS 2016), 2016, :1021-1030

[3] Weighted adaptive concurrency control for software transactional memory [J].

Ansari, Mohammad .

JOURNAL OF SUPERCOMPUTING, 2014, 68 (03) :1027-1047

[4] Researchers Simplify Parallel Programming [J].

Anthes, Gary .

COMMUNICATIONS OF THE ACM, 2014, 57 (11) :13-15

[5]

Barrera I.S., 2020, P 34 ACM INT C SUP I, DOI DOI 10.1145/3392717.3392765

[6] Process Affinity, Metrics and Impact on Performance: an Empirical Study [J].

Bordage, Cyril ;

Jeannot, Emmanuel .

2018 18TH IEEE/ACM INTERNATIONAL SYMPOSIUM ON CLUSTER, CLOUD AND GRID COMPUTING (CCGRID), 2018, :523-532

[7]

Calciu Irina, 2017, ACM SIGOPS Operating Systems Review, V51, P24, DOI [10.1145/3139645.3139650, 10.1145/3139645.3139650]

[8]

Castellaro Mariano, 2011, Psicol. caribe, P1

[9] Adaptive thread mapping strategies for transactional memory applications [J].

Castro, Marcio ;

Goes, Luis Fabricio W. ;

Mehaut, Jean-Francois .

JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING, 2014, 74 (09) :2845-2859

[10]

Castro M, 2012, LECT NOTES COMPUT SC, V7484, P465, DOI 10.1007/978-3-642-32820-6_47

← 1 2 3 4 5 6 →