Software-Hardware Complex for Accelerating System-on-Chip Design Verification

被引：0
|
作者：
A. P. Solodovnikov [1 ]
A. L. Pereverzev [1 ]
A. M. Silantyev [1 ]
机构：
[1] National Research University,
[2] Moscow Institute of Electronic Technology (MIET),undefined
来源：
Russian Microelectronics | 2024年 / 53卷 / 7期
关键词：
verification; emulation; system-on-chip (SoC); FPGA; SystemVerilog; DPI interface;
D O I：
10.1134/S1063739724700938
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：722 / 727
页数：5
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