Research on Circulating Current Suppression Control of Parallel Inverters

Circulating current suppression can effectively improve the reliability and redundancy of parallel inverter systems. The mechanism and influencing factors of the low- and high-frequency zero-sequence circulating current (ZSCC) are analyzed in this study. Based on a mechanism analysis and the built mathematical model, the composite control strategy of zero-sequence voltage difference (ZSVD) compensation and virtual inductance is proposed to suppress the low- and high-frequency ZSCC. In the composite control strategy, the low-frequency ZCSS (LF-ZCSS) is suppressed by the ZSVD compensation method, and the HF-ZCSS is suppressed by the virtual inductance method. The ZSVD compensation is incorporated into the SVPWM as an input to regulate the modulation and suppress the LF-ZCSS, and virtual inductance is introduced into the current control loop to suppress the HF-ZCSS. A parallel system prototype composed of two 6 kW inverters is constructed. The experiments show that the ZSCC of the parallel system is reduced by 45%, which verifies the effectiveness of the proposed composite control strategy.