Directed Assembly of p-Type Tellurium Nanowires for Room-Temperature-Processed Thin-Film Transistors

被引：0

作者：

Puthanveettil, Mohammed Hadhi Pazhaya ^{[1
]}

Singh, Manvendra ^{[1
]}

Amarakonda, Siri Chandana ^{[1
]}

Dasgupta, Subho ^{[1
]}

机构：

[1] Department of Materials Engineering, Indian Institute of Science (IISc), Bengaluru

来源：

IEEE Journal on Flexible Electronics | 2024年 / 3卷 / 10期

基金：

新加坡国家研究基金会;

关键词：

Dielectrophoresis; electrolyte gating; flexible electronics; inkjet printing; tellurium; thin-film transistor (TFT);

D O I：

10.1109/JFLEX.2025.3526083

中图分类号：

学科分类号：

摘要：

The flexible electronics domain has emerged as an alternate technology beyond silicon CMOS because of advancements in low-temperature solution-processable thin-film transistors (TFTs) and circuits. However, uniformity and scalability remain the main hindrances for solution-processed devices, especially when it comes to the deposition of nanomaterials. In this regard, directional assembly using dielectrophoresis is a quick and easy way to uniformly align 1-D nanostructures, for example, nanowires, to bridge a gap between the electrodes to form a transistor channel using nonlinear ac electric fields. In this study, high-hole mobility tellurium nanowires are assembled using nonlinear ac dielectrophoresis to fabricate electrolyte-gated TFTs (EG-TFTs) on a flexible substrate at room temperature. These p-type flexible transistors exhibit an ON–OFF ratio of 3.3 × 102, an ON-current density of 20 µA µm−1, a specific transconductance of 8.5 µS µm−1, and linear mobility of 20.6 cm2 V−1 s−1 with adequate mechanical strain tolerance. © 2022 IEEE All rights reserved.

引用

页码：454 / 460

页数：6

共 50 条

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