Analytical modeling of III-V heterojunction source-all-around vertical tunnel FET and its inverter circuit application

被引:0
|
作者
Ramesh, Potharaju [1 ]
Choudhuri, Bijit [1 ]
机构
[1] Natl Inst Technol Silchar, Dept Elect & Commun Engn, Silchar 788010, Assam, India
关键词
nalytical model; heterojunction; kane's model; poisson's equation; source-all-around TFET; DRAIN CURRENT MODEL; GATE;
D O I
10.1088/1402-4896/ad8d89
中图分类号
O4 [物理学];
学科分类号
0702 ;
摘要
This paper presents a comprehensive analytical modeling framework for the III-V heterojunction source-all-around vertical tunnel field-effect transistor (SAA V-TFET). Using Kane's model, our approach involves solving Poisson's equations to obtain a continuous surface potential profile, followed by the derivation of drain current. These models demonstrate excellent accuracy across all operating regions, precisely predicting the potential profile, output, and transfer characteristics of SAA V-TFETs. We implemented the models in MATLAB and validated them against Sentaurus TCAD simulations. Furthermore, we present a comprehensive performance analysis of SAA V-TFET-based digital inverters.
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页数:14
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