Binary Adder, Subtractor and Parity Checker Based on Optical Logic Gates

被引：0

作者：

Fan, Shunyao ^{[1
]}

Dutta, Niloy K. ^{[1
]}

机构：

[1] Department of Physics, University of Connecticut, Storrs, 06269, CT

来源：

International Journal of High Speed Electronics and Systems | 2024年 / 33卷 / 2-3期

关键词：

adder; Optical logic gates; parity checker; quantum dot-semiconductor optical amplifier; subtractor;

D O I：

10.1142/S0129156424400573

中图分类号：

学科分类号：

摘要：

We propose schemes for binary adder, subtractor and parity checker using optical logic gates. These schemes could be useful for calculations using optical systems. Utilizing optical logic gates, we can achieve functions of binary adder, subtractor and parity checker of high-speed optical signals. Due to two-photon absorption in the wetting layer, quantum dot-semiconductor optical amplifier Mach-Zehnder interferometer (QD-SOA-MZI) can work as high data rate optical logic gates. The simulated result supports the idea that it is possible to realize all-optical binary adder, subtractor and parity checker at high optical signal rates. © 2024 World Scientific Publishing Company.

引用

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