A Highly Reconfigurable Signal Acquisition Analog Front-end IC for Bidirectional Neural Interface SoCs

paper proposes a low-power, low-noise neural recording analog front-end (AFE) integrated circuit (IC) for bidirectional neural interface systemon-chips (SoCs). The proposed AFE signal conditioning chain offers flexibility to support both local field potentials and action potentials through adjustable gain and bandwidth. The AFE also integrates an active common-mode cancellation loop (CMCL) that can tolerate common-mode stimulation artifacts up to 1 Vpp. The CMCL circuit can be controlled by comparators and logic circuits to operate only when large artifacts are present. Implemented using a 0.18-mu m CMOS process, the measured overall voltage gain range of the entire AFE is 40 dB to 60 dB. The high-pass cutoff frequency is adjustable from sub-1 Hz to 500 Hz, and the lowpass cutoff frequency is switchable from 280 Hz to 10 kHz. For 1-10 kHz frequency range, the measured integrated input referred noise (IRN) is 2.12 mu Vrms when CMCL is disabled, while the IRN is 3.29 mu Vrms with CMCL enabled. The total power consumption of the proposed AFE is 2.6 mu W at 1-V supply voltage.