Fully dynamic zoom ADC with energy-efficient residue feedforward and two-step summation

This paper proposes a fully dynamic zoom ADC based on residue feedforward and correlated level shifting (CLS)-assisted floating inverter amplifier (FIA) technique with 200 x bandwidth/power scalability, by only changing the clock frequency. A CLS-assisted FIA which achieves 65 dB DC gain is employed to reduce errors from finite FIA gain. An energy-efficient residue feedforward path extracted from the input of the SAR ADC's comparator minimizes the leakage of the SAR ADC's quantization noise into the band. A novel two-step summation approach is proposed to minimize capacitor areas compared to a traditional passive switched-capacitor adder. The post-simulated results show the prototype ADC with near-constant energy efficiency, which scales power from 5 mu W to 822 mu W, achieves high resolution (>100 dB) during the scalable bandwidth. At 20 kHz BW, it achieves 106.2 dB DR, 102.0 dB SNDR, leading to FoM(DR) of 180.0 dB and FoM(SNDR) of 175.8 dB.