The paper presents some problems of reliability, testing, and quality assurance of semiconductor memories. Three methods are reviewed for hardware testing: a) method for highly sequential circuits testing, b) microprocessor testing, when faults are associated with registers and functions rather than with gates, and c) the method which consists of deriving a graph-theoretic model from the ″user's manual″ description. The paper reflects part of materials from the conference ″Exploding Technology, Responsible Growth″ that took place at February-March, 1979, in San Francisco.