ONE-CHIP MICROCOMPUTER EXCELS IN I/O AND MEMORY-INTENSIVE USES.

被引:0
作者
Peuto, Bernard L.
Prosenko, Gary J.
Estrin, Judy
Bass, Charles
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Electronics | 1978年 / 51卷 / 18期
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Eight-bit microprocessors have increased in performance and sophistication, but they have taken one of two different paths in doing so. On the one hand, some have evolved into single-chip microcomputers that emphasize input and output efficiency to the extent that they often function as microcontrollers. Others, meanwhile, have improved as microprocessors - that is, memory-intensive machines for crunching numbers and manipulating data. Although each type is suited for particular applications, it is desirable that, ultimately, one architecture serve both needs. This two-part article presents and 8-bit single-chip microcomputer that can serve as either an I/O-intensive microcomputer or as a memory-intensive microprocessor. part 1 exmines the architecture that makes this possible, and Part 2 discusses the design's software.
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页码:128 / 137
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共 44 条
[31]   Bidirectional RS-232 communication uses only one I/O line [J].
Garrido, D .
ELECTRONIC DESIGN, 2000, 48 (10) :128-+
[32]   FAST SIGNAL PROCESSOR COMES RICH WITH MEMORY, I/O LINES ON CMOS CHIP [J].
RAMACHANDRAN, G ;
JUJII, S .
ELECTRONIC DESIGN, 1984, 32 (10) :227-&
[33]   DATA ACQUISITION CONTROL-SYSTEM USES INTERNAL 16-BIT MICROCOMPUTER TO HANDLE 4800 I/O LINES [J].
不详 .
COMPUTER DESIGN, 1982, 21 (09) :80-&
[34]   Loop restructuring for data I/O minimization on limited on-chip memory embedded processors [J].
Tembe, W ;
Pande, S .
IEEE TRANSACTIONS ON COMPUTERS, 2002, 51 (10) :1269-1280
[35]   Memory Mapped I/O Register Test Case Generator for Large Systems-on-Chip [J].
Hamalainen, Roni ;
Lunnikivi, Henri ;
Hamalainen, Timo .
2023 IEEE NORDIC CIRCUITS AND SYSTEMS CONFERENCE, NORCAS, 2023,
[36]   Balanced Memory Architecture for High I/O Intensive Information Services for Autonomous Decentralized System [J].
Takahashi, Hironao ;
Mori, Kinji ;
Ahmad, Hafiz Farooq .
ISADS 2009: 2009 INTERNATIONAL SYMPOSIUM ON AUTONOMOUS DECENTRALIZED SYSTEMS, PROCEEDINGS, 2009, :93-+
[37]   A novel non-volatile memory storage system for I/O-intensive applications [J].
Han, Wen-bing ;
Chen, Xiao-gang ;
Li, Shun-fen ;
Li, Ge-zi ;
Song, Zhi-tang ;
Li, Da-gang ;
Chen, Shi-yan .
FRONTIERS OF INFORMATION TECHNOLOGY & ELECTRONIC ENGINEERING, 2018, 19 (10) :1291-1302
[38]   A novel non-volatile memory storage system for I/O-intensive applications [J].
Wen-Bing Han ;
Xiao-Gang Chen ;
Shun-Fen Li ;
Ge-Zi Li ;
Zhi-Tang Song ;
Da-Gang Li ;
Shi-Yan Chen .
Frontiers of Information Technology & Electronic Engineering, 2018, 19 :1291-1302
[40]   Over-Clocked SSD: Safely Running Beyond Flash Memory Chip I/O Clock Specs [J].
Zhao, Kai ;
Venkataraman, Kalyana S. ;
Zhang, Xuebin ;
Li, Jiangpeng ;
Zheng, Ning ;
Zhang, Tong .
2014 20TH IEEE INTERNATIONAL SYMPOSIUM ON HIGH PERFORMANCE COMPUTER ARCHITECTURE (HPCA-20), 2014, :536-545