Adaptive block-matching motion estimation algorithm for lowpower VLSI implementation

A new adaptive block-matching algorithm is proposed for the low power implementation of motion estimators. The algorithm fully utilizes the motion and image characteristics to dynamically reduce the computational complexity. A novel two-stage search strategy is used, in which a motion track search is conducted followed by a telescopic search, The two-stage search can end early after the motion track search and the search window size is adaptively adjusted. In addition, the bit-resolution of the pixel values adaptively varies with the image characteristics and alternatively varies with the telescopic search steps. Simulation results show that, compared with the conventional algorithm, the new algorithm reduces the average computational load to only 30%-40% while providing similar decoded picture quality. A systolic array search engine is proposed for the low-power hardware implementation of the algorithm.