In the last twenty-five years, while device density on silicon chips has improved several orders of magnitude, the package-to-board area ratio for housing these circuits has undergone relatively modest improvement. In the near term, improvements in packaging include surface mounted packages such as proposed chip carriers with 20 and 25 mil spaced terminals. Longer range, the densities will be increased sharply by using pre-tested and pre-burned-in chips with surface interconnect direct to the board.