MEMORY BOARD USING ON-CHIP CACHE CD BUBBLE DEVICES.

被引：0

作者：

Nagai, H. ^{[1
]}

Yamada, Y. ^{[1
]}

Suga, S. ^{[1
]}

Takahashi, K. ^{[1
]}

机构：

[1] NEC, Jpn, NEC, Jpn

来源：

IEEE translation journal on magnetics in Japan | 1984年 / TJMJ-1卷 / 03期

关键词：

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

Summary form only given. The authors describe evaluation of a newly developed on-chip 4-Mb bubble memory chip using 4 mu m period ion injection. Four on-chip cache memories were mounted on a memory board and driven in series; the maximum data transfer rate achieved for a driving frequency of 125 kHz was 125 kb/s. The use of a return start capability in the memory board meant that the memory operation enabled the maximum data transfer rate to be roughly maintained in consecutive access sequences.

引用

页码：295 / 297

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