LOGIC DELAY CHARACTERIZATION OF A LSSD LOGIC CIRCUIT USING A SCAN RING.

被引：0
|
作者：
Anon
机构：
来源：
IBM technical disclosure bulletin | 1985年 / 27卷 / 11期
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中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
This article describes the use of a scan ring in a level sensitive scan design (LSSD) logic circuit to measure logic delay characteristics. Software programs can simulate logic delay characteristics, but do not use real hardware to verify the delays. Further methods of measuring logic delay include varying oscillator speed, but in many systems the oscillator cannot be varied. The method described does not require any additional hardware and uses existing logic in the scan ring.
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页码：6595 / 6596
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