n-channel enhancement mode InP MISFETs based on InP/SiO2 interface are fabricated on Fe-doped S. I. InP 〈100〉 orientated with TEOS-PECVD SiO2 as the gate oxide. Source-drain regions are implanted with Si+ to create n+ layers. The effective electron channel mobiity and transconductance are 1400 cm2/V·S and 6.4 ms/mm respectively. The characteristics of the MISFETs and long-term drain current drift of the MISFETs are discussed.