TRIDIAGONALIZATION OF A SYMMETRIC MATRIX ON A SQUARE ARRAY OF MESH-CONNECTED PROCESSORS.

被引：0

作者：

Bojanczyk, A. ^{[1
]}

Brent, R.P. ^{[1
]}

机构：

[1] Australian Natl Univ, Canberra, Aust, Australian Natl Univ, Canberra, Aust

来源：

Journal of Parallel and Distributed Computing | 1985年 / 2卷 / 03期

关键词：

D O I：

10.1016/0743-7315(85)90028-0

中图分类号：

学科分类号：

摘要：

引用

页码：261 / 276

共 34 条

[1] INTEGER SORTING ON A MESH-CONNECTED ARRAY OF PROCESSORS
KRIZANC, D
INFORMATION PROCESSING LETTERS, 1993, 47 (06) : 283 - 289
[2] TERM MATCHING ON A MESH-CONNECTED ARRAY OF PROCESSORS
DELCHER, AL
KASIF, S
ANNALS OF MATHEMATICS AND ARTIFICIAL INTELLIGENCE, 1995, 14 (2-4) : 177 - 186
[3] A DISTRIBUTED-TERMINATION EXPERIMENT ON A MESH-CONNECTED ARRAY OF PROCESSORS
SONG, JJ
PARALLEL COMPUTING, 1992, 18 (07) : 779 - 791
[4] ON DEPENDABILITY EVALUATION OF MESH-CONNECTED PROCESSORS
MOHAPATRA, P
DAS, CR
IEEE TRANSACTIONS ON COMPUTERS, 1995, 44 (09) : 1073 - 1084
[5] MESH-CONNECTED ARRAY PROCESSORS WITH BYPASS CAPABILITY FOR SIGNAL IMAGE-PROCESSING
KIM, DS
HWANG, K
PROCEEDINGS OF THE TWENTY-FIRST, ANNUAL HAWAII INTERNATIONAL CONFERENCE ON SYSTEM SCIENCES, VOLS 1-4: ARCHITECTURE TRACK, SOFTWARE TRACK, DECISION SUPPORT AND KNOWLEDGE BASED SYSTEMS TRACK, APPLICATIONS TRACK, 1988, : 203 - 210
[6] RECONFIGURING THE BOUNDARIES OF A MESH-CONNECTED ARRAY OF PROCESSORS WITH RUN-TIME PROGRAMMABLE LOGIC
CUCCHIARA, R
CINOTTI, TS
NERI, G
RUSTICHELLI, G
MICROPROCESSORS AND MICROSYSTEMS, 1993, 17 (02) : 67 - 73
[7] OPTIMAL SIMULATIONS BETWEEN MESH-CONNECTED ARRAYS OF PROCESSORS
KOSARAJU, SR
ATALLAH, MJ
JOURNAL OF THE ACM, 1988, 35 (03) : 635 - 650
[8] A UNIFIED ALGORITHM FOR SORTING ON MULTIDIMENSIONAL MESH-CONNECTED PROCESSORS
CORBETT, PF
SCHERSON, ID
INFORMATION PROCESSING LETTERS, 1991, 37 (04) : 225 - 231
[9] Efficient techniques and hardware analysis for mesh-connected processors
Jigang, W
Srikanthan, T
Heiko, S
DISTRIBUTED AND PARALLEL COMPUTING, 2005, 3719 : 442 - 446
[10] SELF-RECONFIGURING INTERCONNECTION NETWORK FOR A FAULT-TOLERANT MESH-CONNECTED ARRAY OF PROCESSORS
PATERAS, S
RAJSKI, J
ELECTRONICS LETTERS, 1988, 24 (10) : 600 - 602

← 1 2 3 4 →