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Fast and processor efficient parallel matrix multiplication algorithms on a linear array with a reconfigurable pipelined bus system
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State Univ of New York, New Paltz, United States
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IEEE Trans Parallel Distrib Syst
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8卷
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705-720期
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The authors are grateful to the four anonymous reviewers whose criticism and constructive comments helped to improve the presentation of the paper. Keqin Li was supported by the U.S. National Aeronautics and Space Administration and the State University of New York through the NASA/University Joint Venture in Space Science Program under Grant NAG8-1313 and the 1996 NASA/ASEE Summer Faculty Fellowship Program. Yi Pan was supported by the U.S. National Science Foundation under Grants CCR-9211621 and CCR-9503882;
the U.S. Air Force Avionics Laboratory;
Wright Laboratory;
Dayton;
Ohio;
under Grant F33615-C-2218;
and an Ohio Board of Regents Investment Fund Competition Grant. Si Qing Zheng was supported by the U.S. National Science Foundation under Grant ECS-9626215 and Louisiana Grant LEQSF (1996-99)-RD-A-16;
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