VERTICAL ISOLATION IN SHALLOW n-WELL CMOS CIRCUITS.

被引：0
|
作者：
Lewis, Alan G. [1 ]
Martin, Russel A. [1 ]
Chen, John Y. [1 ]
Huang, Tiao-Yuan [1 ]
Koyanagi, Mitsumasa [1 ]
机构：
[1] Xerox Palo Alto Research Cent, CA, USA, Xerox Palo Alto Research Cent, CA, USA
来源：
Electron device letters | 1987年 / EDL-8卷 / 03期
关键词：
D O I：
10.1109/edl.1987.26568
中图分类号：
学科分类号：
摘要：
Integrated circuits, VLSI
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页码：107 / 109
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