UNCOMMITTED LOGIC ARRAY WHICH PROVIDES COST-EFFECTIVE MULTIPLICATION EVEN FOR LONG WORDS.

This paper discusses methods of multiplication and identifies a method which is particularly suited to bit-slice integration and the multiplication of longer words such as 64 multiplied by 64 bits. A 2-bit slice has been designed on an uncommitted logic array, and these have been built into and tested in a 16 multiplied by 16 bit system. The results of the experiment are reported, and extrapolation from these show that a 64 multiplied by 64 bit multiplier can be built with 71 integrated-circuit chips to provide a multiplication time of less than 290 ns. Other developments are indicated which show that a reduction of these figures to 56 chips and 115 ns can be achieved.