Rapid thermal process-induced defects in silicon position detectors

We have demonstrated that it is possible to obtain low levels of defects and contaminations in the bulk and at the Si/SiO2 interface with correlated good electrical parameters of the active area of the Si detector. we have combined various technological methods, such as very low-temperature (80 K) ion implantation, reasonably low-temperature (600°C) fast annealing (30s) after the ion implantation process, barrier layer (SiO2) during ion-implantation and fast annealing processes to prevent the penetration of impurities into the interface, and a final low temperature (400°C) heat treatment to reduce interface trap density generated by electron-beam metallization.