SOI implementation of a 64-bit adder

被引：0

作者：

Tran, J.V. ^{[1
]}

Mounes-Toussi, F. ^{[1
]}

Storino, S.N. ^{[1
]}

Stasiak, D.L. ^{[1
]}

机构：

[1] IBM Corp, Rochester, United States

来源：

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors | 1999年

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D O I：

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中图分类号：

学科分类号：

摘要：

引用

页码：573 / 574

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