共 50 条
- [31] Level assignment for displaying combinational logic EUROMICRO SYMPOSIUM ON DIGITAL SYSTEMS DESIGN, PROCEEDINGS, 2001, : 148 - 151
- [32] Design of Combinational Logic circuits for Low power Reversible Logic circuits in Quantum Cellular Automata 2014 INTERNATIONAL CONFERENCE ON INFORMATION COMMUNICATION AND EMBEDDED SYSTEMS (ICICES), 2014,
- [33] Evaluation of parallel synchronous and conservative asynchronous logic-level simulations VLSI Des, 2 (91-105):
- [35] Techniques for estimation of design diversity for combinational logic circuits INTERNATIONAL CONFERENCE ON DEPENDABLE SYSTEMS AND NETWORKS, PROCEEDINGS, 2001, : 25 - 34
- [38] Timing Analysis of Combinational Circuits in Intuitionistic Propositional Logic Formal Methods in System Design, 2000, 17 : 5 - 37
- [39] Virtual reconfigurable architecture for evolving combinational logic circuits Journal of Central South University, 2014, 21 : 1862 - 1870
- [40] Parallel algorithms for detecting hazards in combinational logic circuits IEEE 2000 TENCON PROCEEDINGS, VOLS I-III: INTELLIGENT SYSTEMS AND TECHNOLOGIES FOR THE NEW MILLENNIUM, 2000, : 177 - 181