DESIGN OF A DATA DRIVEN PROCESSING ELEMENT.

The design of an architectural element intended for use in a multiprocessor configuration is presented. Data driven operation is achieved through execution of encoded data flow programs. Parallelism inherent in program structure may thus be used to enhance execution speed. A method of translation into suitable machine language representations is given. Components of the processing element are discussed, including an instruction store using Content Addressable Memory for detection of enabled instructions. Consistent execution control algorithms allow pipelined instruction processing. Implementation of the processing element may be accomplished using commercially available MSI and LSI devices.