Area-efficient multipliers for digital signal processing applications

被引:0
|
作者
Analog Devices Inc, Wilmington, United States [1 ]
机构
关键词
Number:; -; Acronym:; NSERC; Sponsor: Natural Sciences and Engineering Research Council of Canada;
D O I
暂无
中图分类号
学科分类号
摘要
引用
收藏
相关论文
共 50 条
  • [1] Area-efficient multipliers for digital signal processing applications
    Kidambi, SS
    ElGuibaly, F
    Antoniou, A
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1996, 43 (02): : 90 - 95
  • [2] An Efficient Design for Area-Efficient Truncated Adaptive Booth Multiplier for Signal Processing Applications
    Radhakrishnan, S.
    Karn, Rakesh Kumar
    Nirmalraj, T.
    JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2021, 30 (03)
  • [3] Area-efficient parallel adder with faithful approximation for image and signal processing applications
    Palanisamy, Gnanambikai
    Natarajan, Vijeyakumar Krishnasamy
    Sundaram, Kalaiselvi
    IET IMAGE PROCESSING, 2019, 13 (13) : 2587 - 2594
  • [4] Computationally efficient bicomplex multipliers for digital signal processing
    Toyoshima, H
    IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 1998, E81D (02) : 236 - 238
  • [5] VLSI Implementation of Area-Efficient Truncated Modified Booth Multiplier for Signal Processing Applications
    Vijeyakumar, K. N.
    Sumathy, V.
    Elango, S.
    ARABIAN JOURNAL FOR SCIENCE AND ENGINEERING, 2014, 39 (11) : 7795 - 7806
  • [6] VLSI Implementation of Area-Efficient Truncated Modified Booth Multiplier for Signal Processing Applications
    K. N. Vijeyakumar
    V. Sumathy
    S. Elango
    Arabian Journal for Science and Engineering, 2014, 39 : 7795 - 7806
  • [7] On area-efficient low power array multipliers
    Wang, YK
    Jiang, YT
    Sha, E
    ICECS 2001: 8TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-III, CONFERENCE PROCEEDINGS, 2001, : 1429 - 1432
  • [8] High speed and area-efficient multiply accumulate (MAC) unit for digital signal prossing applications
    Abdelgawad, A.
    Bayoumi, Magdy
    2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, 2007, : 3199 - 3202
  • [9] Area-Efficient Multipliers Based on Multiple-Radix Representations
    Dimitrov, Vassil S.
    Jarvinen, Kimmo U.
    Adikari, Jithra
    IEEE TRANSACTIONS ON COMPUTERS, 2011, 60 (02) : 189 - 201
  • [10] Efficient Logarithmic Converters for Digital Signal Processing Applications
    De Caro, Davide
    Petra, Nicola
    Strollo, Antonio G. M.
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2011, 58 (10) : 667 - 671