HARDWARE ALGORITHMS FOR COMPUTING EXPONENTIALS AND LOGARITHMS USING REDUNDANT BINARY REPRESENTATION.

被引：0

作者：

Takagi, Naofumi ^{[1
]}

Yajima, Shuzo ^{[1
]}

机构：

[1] Kyoto Univ, Kyoto, Jphn, Kyoto Univ, Kyoto, Jphn

来源：

Systems and Computers in Japan | 1986年 / 17卷 / 12期

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D O I：

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摘要：

引用

页码：11 / 22

共 24 条

[1] HARDWARE ALGORITHM FOR COMPUTING SINE AND COSINE USING REDUNDANT BINARY REPRESENTATION.
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[2] SQUARE ROOT HARDWARE ALGORITHM USING REDUNDANT BINARY REPRESENTATION.
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[3] On-line algorithms for computing exponentials and logarithms
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[7] NEW ALGORITHMS FOR APPROXIMATE EVALUATION IN HARDWARE OF BINARY LOGARITHMS AND ELEMENTARY FUNCTIONS
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[9] A Unified Hardware Design for Multiplication, Division, and Square Roots Using Binary Logarithms
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[10] High-performance divider using redundant binary representation
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2002 45TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I, CONFERENCE PROCEEDINGS, 2002, : 471 - 474

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