共 50 条
[32]
Design for consecutive transparency of cores in system-on-a-chip
[J].
21ST IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS,
2003,
:287-292
[33]
Submicron CMOS technology: The enabling tool for system-on-a-chip integration
[J].
ALCATEL TELECOMMUNICATIONS REVIEW,
1996, (02)
:130-137
[34]
A structured system methodology for FPGA based system-on-a-chip design
[J].
12TH ANNUAL IEEE SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, PROCEEDINGS,
2004,
:271-272
[35]
Hybrid BIST for system-on-a-chip using an embedded FPGA core
[J].
22ND IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS,
2004,
:353-358
[36]
Intrusion aware System-on-a-Chip design with uncertainty classification
[J].
PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS,
2008,
:527-+
[37]
Multidisciplinary collaborative design course for system-on-a-chip (SOC)
[J].
MICROELECTRONICS EDUCATION,
2000,
:257-260
[38]
System-on-a-chip approach for industrial robotic controller design
[J].
2000 IEEE INTERNATIONAL CONFERENCE ON SEMICONDUCTOR ELECTRONICS, PROCEEDINGS,
2000,
:120-123
[39]
Using System-on-a-Chip as a vehicle for VLSI design education
[J].
2003 IEEE INTERNATIONAL CONFERENCE ON MICROELECTRONIC SYSTEMS EDUCATION, PROCEEDINGS,
2003,
:148-149