ANALYSIS OF PROCESSOR-MEMORY INTERCONNECTION NETWORKS.

被引：0
|
作者：
Bhuyan, Laxmi N. [1 ]
机构：
[1] Univ of Southwestern Louisiana, Dep, of Electrical & Computer, Engineering, Lafayette, LA, USA, Univ of Southwestern Louisiana, Dep of Electrical & Computer Engineering, Lafayette, LA, USA
来源：
IEEE Transactions on Computers | 1985年 / C-34卷 / 03期
关键词：
DATA STORAGE; DIGITAL;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
An interference analysis of the interconnection networks (IN's) for tightly coupled multiprocessor is presented in this correspondence. The interconnections considered are crossbars and delta networks. Two situations are examined: when a memory module is equally likely to be addressed by a processor and when a processor has a favorite memory. It is shown that for a higher rate of favorite requests, the delta networks perform close to a crossbar.
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页码：279 / 283
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