Analytic Model for Timing Recovery Circuits in Digital Modems.

被引:0
作者
Kammeyer, Karl Dirk
Schenk, Heinrich
机构
来源
AEU. Archiv fur Elektronik und Ubertragungstechnik | 1980年 / 34卷 / 02期
关键词
D O I
暂无
中图分类号
学科分类号
摘要
14
引用
收藏
页码:81 / 88
相关论文
共 50 条
[41]   CARRIER FREQUENCY RECOVERY IN ALL-DIGITAL MODEMS FOR BURST-MODE TRANSMISSIONS [J].
LUISE, M ;
REGGIANNINI, R .
IEEE TRANSACTIONS ON COMMUNICATIONS, 1995, 43 (2-4) :1169-1178
[42]   Carrier frequency recovery in all-digital modems for burst-mode transmissions [J].
Univ of Pisa, Pisa, Italy .
IEEE Trans Commun, 2 -4 pt 2 (1169-1178)
[43]   ANALYSIS OF JITTER ACCUMULATION IN A CHAIN OF PLL TIMING RECOVERY CIRCUITS [J].
SHIMAMURA, T ;
EGUCHI, I .
IEEE TRANSACTIONS ON COMMUNICATIONS, 1977, 25 (09) :1027-1032
[44]   MODEL FOR CARRIER RECOVERY, TIMING RECOVERY AND ADAPTIVE EQUALISATION IN HIGH-CAPACITY DIGITAL RADIO SYSTEMS. [J].
Kabaila, Paul V. ;
Adams, Jennifer L. .
ATR, Australian Telecommunication Research, 1985, 19 (01) :53-65
[45]   Static Timing Model Extraction for Combinational Circuits [J].
Li, Bing ;
Knoth, Christoph ;
Schneider, Walter ;
Schmidt, Manuel ;
Schlichtmann, Ulf .
INTEGRATED CIRCUIT AND SYSTEMS DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION, 2009, 5349 :156-166
[46]   ILLIADS - A FAST TIMING AND RELIABILITY SIMULATOR FOR DIGITAL MOS CIRCUITS [J].
SHIH, YH ;
LEBLEBICI, Y ;
KANG, SM .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1993, 12 (09) :1387-1402
[47]   Statistical timing for parametric yield prediction of digital integrated circuits [J].
Jess, JAG ;
Kalafala, K ;
Naidu, SR ;
Otten, RHJM ;
Visweswariah, C .
40TH DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2003, 2003, :932-937
[48]   Statistical timing for parametric yield prediction of digital integrated circuits [J].
Jess, Jochen A. G. ;
Kalafala, Kerim ;
Naidu, Srinath R. ;
Otten, Ralph H. J. M. ;
Visweswariah, Chandu .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2006, 25 (11) :2376-2392
[49]   Digital Clock and Data Recovery Circuits for Optical Links [J].
Shu, Guanghua ;
Choi, Woo-Seok ;
Hanumolu, Pavan Kumar .
2016 IEEE COMPOUND SEMICONDUCTOR INTEGRATED CIRCUIT SYMPOSIUM (CSICS), 2016, :126-129
[50]   Timing recovery for sampling detectors in digital magnetic recording [J].
Shafiee, H .
1996 IEEE INTERNATIONAL CONFERENCE ON COMMUNICATIONS - CONVERGING TECHNOLOGIES FOR TOMORROW'S APPLICATIONS, VOLS. 1-3, 1996, :577-581