NEW POINTS FOR ACL ADD RELIABILITY AND SIMPLICITY TO LOGIC SYSTEMS.

The fast edges associated with high-speed logic like ACL can cause transients at the internal supply connections, reducing the effective supply voltage to the chip and causing transients at any unswitched outputs. This degrades system reliability by reducing noise margins and speed, and causing loss of stored data and false switching. To overcome this for ACL ICs, we used edge-control circuitry to limit the di/dt of the output transistors during turn-on without reducing it during turn-off. The output drive current is maintained at 24 ma to permit incident wave switching with 50 OMEGA or 75 OMEGA transmission line loads. We relocated the supply pins to the center of opposite sides of the package to minimize their inductance. ICs with more than two outputs that can switch simultaneously have multiple parallel-connected V//c//c and GND pins to reduce their inductance yet further.