Clock jitter in a servo-derived clocking scheme for magnetic disk drives

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作者
Sony Corp, Kanagawa, Japan [1 ]
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来源
IEEE Trans Magn | / 4 pt 2卷 / 3283-3290期
关键词
Analog to digital conversion - Computer simulation - Magnetic heads - Magnetic recording - Mathematical models - Phase locked loops - Phase measurement - Signal detection - Timing circuits;
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摘要
The performance of a simple servo-derived clocking scheme for magnetic disk recording channels is presented. Using a theoretical model, the bit clock jitter is analyzed by computer simulation, and it is shown that in the bit clock jitter the mechanical component (velocity jitter) is more influential than the jitter component which originates from the position noise in the detected clock mark readback pulse. Cancellation error of an eccentricity jitter component between writing and reading moments due to PLL (Phase-Locked Loop) gain variation can be reduced by a feed-forward eccentricity suppression technique. Part of simulation results are verified by jitter measurements using an experimental recording channel, a patterned magnetic disk and an MR/Inductive head. Bit clock jitter of less than 2.5 ns(rms) is obtained for a spindle with airbearing, supporting the analytical results. The simple servoderived clocking scheme can be used in magnetic disk drives with a data rate of 20 Mbit/s or more.
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